Keyboard with roll-over feature

ABSTRACT

In a keyboard two or more keys may be jointly depressed. The keys are successively interrogated and the decision that a &#39;&#39;&#39;&#39;new&#39;&#39;&#39;&#39; key is interrogated is obtained in that in this event there is no equality with the code data of keys contained in a store. When the keys are released the code data of this key are erased or rendered inoperative.

:1 States Patent 1 I 1 3.15am Elzinga July 3i, 1973 [54] KEYBOARD WITH ROLL-OVER FEATURE [75] Inventor: Johannes Mattheus Elzinga, [56] Reierences Cited Emmasingel, Eindhoven, UNITED STATES PATENTS Netherlands 3,675,239 7/1972 Ackerman et 340/365 5 [73] Assignee: U.S. Philips Corporation, New York,

NY Primary Exammer-Donald J. Yusko I Assistant Examiner-R0bcrt .l. Mooney [22] Flled: 1971 Attorney-Frank R. Trifnri [2i] Appl. No.: 195,415

[57] ABSTRACT In 21 kc board two or more ke 3 ma be inll d Fi Ii PiiDta Y [30] N 3 z d r or ty a 7m 6723 pressed. The keys are successively interrogated and the 1 at er an s decision that a new key is interrogated is obtained in that in this event there is no equality with the code data [52] 340/365 ggk ig gfgii of keys contained in a store. When the keys are re [51] Int CI b 3/02 leased the code data of this key are erased or rendered 58 Field of Search 340/365, 146.1 AB,

CONTROL PULSE GENERATOR nerecron D C KEYS A A F1 DECODER as REST KEY INTERROGATING DEVICE 4 Claims, 3 Drawing Figures CONTROL. UNIT OOMPARISON DEVICES PAIENIEU 3.750.160

sum 1 OF 3 CONTROL PULSE GENERATOR DETECTOR D C CONTROL UNIT xevs DECODER F2 F4 A7 sou A G DEVICES g gn a I I REST KEY INTERROGATING DEVICE OUTPUT DEVICE Fig.1

1 N VE NTOR.

JOHANNES M, ELZINGA PATENIE JUL 3 1 I975 sum 2 or 3 ADDITIONAL BISTABLE [ELEMENTS CONTROL BISTAB LE DEVICE I 'IECODER PULSE GENERATORS JNTERROGATING 'DEVICES 'REST KEYS INVENTOR. JOHANNES M. ELZINGA PATENTEDJULBI m5 3.750.160

SHEEF 3 0F 3 DETECTORS COMPARATOR CONTROL TOR UNITS PULSE GEN F1 DECODER INTERROGATING DEVICE OUTPUT DEVICE Fig.3

INVENTOR. JOHANNES M.ELZ|NGA 1 KEYBOARD WITH ROLL-OVER FEATURE The invention relates to a keyboard which comprises an interrogating device by means of which the keys are successively interrogated, a storage device which includes first elements in which the code data of a first depressed key may be stored, at least one output terminal and an output device capable of connecting an output of the storage device to the output terminal so that the said code data appear once at the output terminal. Such keyboard devices are used, for example, to enter data and instructions into computers. Usually keys are successively depressed, each key being released before the next key is depressed. However, if the next key is depressed too early, errors may be produced. From the release of the first key a release signal may be derived. The release signal enables the second key to be interrogated at this instant only or renders available the code data of the key which has been depressed later. However, this system is rendered ineffective when the second key is the first to be released. In addition this system introduces a delay which may be detrimental. To obviate these disadvantages a keyboard according to the invention is characterized in that the storage device includes second elements in which the code data of at least one second key which is depressed and interrogated later may be stored, all the said code data being stored at least until the associated key is released. The code data of an interrogated and depressed kay may be applied to a comparison devicein which they may be compared with all the key code data stored in the storage device. If there is no correspondence between the code data of the interrogated and depressed key the comparison device may so control the said output de-.

vice that this connects an output of the storage device to an output of each of the said second elements and to the output terminal.

A preferred embodiment of a keyboard according to the invention is characterized in that the keys are successively interrogated continuously, in that a rest key is provided and in that the storage device may contain the code data of at least three keys. This ensures that when the keys are released the storage device after some time contains the code data of the rest key only; thus erasure is automatic.

A simple and cheap construction further is characterized in that the storage device comprises a series of units each capable of storing the code data of one key. When the code data of a newly interrogated key are stored all the previously stored code data are shifted one place in the series. Thus any selecting devices may be dispensed with.

Usually the capacity of the first elements of the storage device is limited, i.e., smaller than corresponds with the number of keys of the keyboard. Hence a further embodiment of a keyboard according to the invention is characterized in that. in the case of noncorrespondence moreover the capacity of the storage device is fully occupiedby significant keys the comparison device delivers an error signal. When a nondepressed key is interrogated a smaller number of operations are performed than when a depressed key is interrogated. Hence, when the interrogation is controlled by a clock a preferred embodiment of a keyboard according to the invention is characterized in that the said clock after interrogation of a depressed key delivers a lower pulse frequency, at least during a time in-which the comparison device compares the said code data. Keys which are successively depressed with an excessively short time interval may give rise to errors. Therefore another embodiment of a keyboard according to the invention is characterized in that a blocking device is provided which delivers an error signal by which access to the output terminal is blocked when a newly depressed key the code data of which appear at the output terminal is being interrogated and within a given period of time another key is depressed.

A keyboard according to the invention may be used in conjunction with a computer.

Embodiments of the invention will now be described, by way of example, with reference to the accompanying diagrammatic drawings.

FIG. 1 is a block diagram of a preferred embodiment of the invention,

FIG. 2 and FIG. 3 are block diagrams of alternate embodiments of the invention.

Referring now to FIG. 1, there is shown a keyboard having seven keys A1 A7, a rest key A8, an interrogating device B, a pulse generator C, a detector D, a decoder E, four stores F1 F4 which each comprise three bistable elements, an output device G, an output terminal H, a logic unit I, nine comparison devices J1, J2, J3, K1, K2, K3, Q1, Q2 and Q3, four control units, L, N, O and P, and a pulse generator M.

The pulse generator C delivers clock pulses which cause the interrogating device B always to interrogate a next key. interrogating device B therefore operates as a clock pulse controlled commutation. When a key, for example A2, is depressed, this is detected by the detector D. If, now, within a given time interval a key is again depressed, this is detected by the detector D which delivers an error signal. As a result, for example the pulse generator C may be stopped and an error signal may be displayed by an indicator not shown. The time interval is determined by the fact that it takes a certain time to process the code data of a newly interrogated key, but

mainly by mechanical tolerances and by bouncing" which causes a contact to be broken several times before it is permanently made, This time may, for example, total 10 ms. When the pulse generator C continuously delivers pulses, at a given instant the key A2 will be interrogated. In response to the interrogation of depressed key A2 interrogating device B delivers a signal to the pulse generator M and moreover the address of the key A2 appears at the input of the decoder E, for example through eight lines in parallel, not shown. The pulse generator M, which may be part of the pulse generator C, now delivers, say, five pulses. The first pulse is applied to the decoder E, which as a result decodes the address of the key A2 and supplies the code data to the store F1. The second pulse of the pulse generator M is applied to the comparision devices J1, J2, J3, K 1, K2, K3, Q1, Q2, 03, which then each receive the information from one bistable element of the store F1, the information from the corresponding bistable element of one of the stores F2 F4 and the second pulse from the pulse generator M. Each of the comparison devices J1 Q3 delivers a signal when the said pulse from M arrives and when moreover the items of information from the elements to be compared correspond. The outputs of each set of three comparison devices, for example J1, J2 and J3, are applied to an AND gate which forms part of the logic unit 1. Although a single line is symbollically shown commuting J3 to l, obviously a line from each ofJl, J2 and J3 is necessary. The outputs of the (in this case) three AND gates are applied to the inputs of a NOR gate forming part of I. Only if the code data stored in F1 differ from all the other stored code data will the said NOR gate deliver a pulse to the output device G, as a result of which this is opened for some time like a gate. This may be achieved, for example, in that the said pulse sets a monostable multivibrator to the l position, while the output of the monostable multivibrator together with the output of the storage unit F1 is connected to the inputs of an AND gate. The third, fourth and fifth pulses from the pulse generator M are applied to control units L, N, O and P and each cause the information in the stores F1 F4 to shift one element. Consequently, a 3-bit code requires three pulses to shift the information an entire storage unit, i.e., from F1 to F2, and so on. If moreover the depressed key is a new key, the code data also appear, via the output device G, at the output terminal 1-1.

If no second key is depressed, at the end of the cycle of the interrogating device B the rest key is interrogated and its code data are stored in F2 while the code data of the key A2 are shifted to F3. If during the next cycle the key A3 also is depressed, the storage units have the following contents after interrogation of the keys shown in the following chart.

Now a new key may be depressed. However, if A2 also is released, in the next cycle the rest key only is stored, so that eventually all the stores contain only the code data of the rest key.

The described system may be modified in several manners. First, the number of storable keys may be increased by adding more stores F2 etc. To enable two keys to be simultaneously kept depressed, according to the system described four F units must be provided, because the rest key also is always stored. Furthermore the pulse generator M delivers five pulses, preferably in the interval between two pulses from the pulse generator C. Alternatively, however, during the operation of the pulse generator M the pulse pulse generator C may be caused to operate at a lower frequency. The control line required for this purpose is not shown in FIG. 1. Owing to this arrangement the time required for a cycle will be shorter, because the interrogation of non-depressed keys may be effected at a very high frequency of, say, 0.5 MHz. This still leaves sufficient time for the other functions of the comparison device etc. to be performed, because then the pulse frequency of C is lower. It is further possible for B, E and F 1 together to form a single circuit element.

FIG. 2 shows another embodiment. In this Figure, corresponding elements are designated similarly to those shown in FIG. 1.

The arrangement of FIG. 2 comprises a keyboard having fourteen keys A1, A2, A14 and two rest key A15 and A16 arranged according to a matrix, two interrogating devices A1 and B2, two pulse generators C and C1, two detectors D1 and D2, a decoder E, a logic unit ll, three storage units U1, U2 and U3 which each comprise four bistable elements and an additional bistable element U15, U25 and U35 respectively, an output device S1, two comparison devices T1 and T2, three control units V, W and X, a pulse generator Y, a plurality of output terminals H1 and a bistable device 2.

When a key is depressed the detector D1 delivers a pulse to the pulse generator C. Detection may be performed by means of an additional make contact in the key or because a coil starts drawing current under the influence of the depression of the key. The pulse generator C will then deliver (16 n) pulses and a reset pulse, where n is the number of depressed keys. This may be effected, for example, in that the pulse generator C includes two counters, a first counter which counts from 16 to zero and hence normally delivers 16 pulses per counting sequence, and a second forward counter. The forward counting and backward counting inputs are connected to D1 and D2 respectively. This second counter is a static counter. When the counter contents are equal a reset pulse is generated with a small delay time, while moreover the output for the counting pulses of the first counter is blocked. The detector D2 detects similarly to D1 when a key is released. The output pulses of the pulse generator C are applied to the interrogating device B1 which as a result always interrogates a row of keys in cyclic sequence. From the beginning the interrogating device B2 always interrogates the first column of keys, until after the fourth pulse from the pulse generator C an interrogating pulse is applied to it via the pulse generator Cl, whereupon it interrogates the second column of keys. Thus the key at the intersection of the interrogated row and the interrogated column is interrogated. In this manner 14 keys and a rest key are sequentially interrogated. Then interrogation is terminated by the reset pulse, which also causes the interrogating devices B1 and B2 to be reset to their initial positions. When a depressed key is interrogated, under the control of a first pulse from the pulse generator Y and the address of this key is decoded in the decoder E and applied to the first storage unit U1. Subsequently the pulse generator Y delivers five pulses to the control units V, W and X, causing the information of the storage unit to circulate once via the additional elements U15, U25 and U35. For this purpose the storage units are in the form of shift registers. The information stored in the element U15 is always compared with that in the elements U25 and U35 by means of the comparison devices T1 and T2 respectively. Thus comparison is serially performed. This may be effected in that each correspondence in the comparison devices T1 and T2 delivers a pulse to an input of the logical unit I1, which comprises two binary four-counters, while each carry, i.e., the fact that either counter has reached the rest position, is transmitted as a pulse to the inputs of a NOR gate. As a result the output device S1 may be opened, a seventh pulse from the pulse generator Y then causing the code data to appear at the output terminals H1. However, the code data of a previously depressed key are not applied to H1. We will assume that one key has been depressed. At a certain instant the rest key'AlS will be interrogated. The code data of this key are never applied to the output terminals H1. This may be effected, for example, by applying the th and 16th pulses from the pulse counter C to the logic unit I1 via a connection which is not shown in the Figure, these pulses blocking the output unit S1.

If now another key is depressed, the above described procedure is repeated with the difference that the pulse generator C delivers only 14 interrogating pulses and a reset pulse, so that no rest key is interrogated. Thus, after this cycle the store contains the code data of the two depressed keys. To prevent the code data of a key from being allowed to appear twice at the output a histable device Z is added which is set to the first state by the pulse from the detector D1, so that its output is, for example, a logic 0". By the output pulse of the logic unit I1, however, the bistable device Z is set to the second state, so that its output is a logic 1". When this output is applied to an input of the aforementioned NOR gate in II, this gate can release the code data of one key only per cycle. (If required, a small delay may be incorporated).

If then a third key is depressed, the static counter incorporated in the pulse generator C may deliver an error signal. If, however, a key is released, so that only one key remains depressed, this is detected by the detector D2, with the result that the static counter in the pulse generator C counts backward unity, a cycle comprising fifteen pulses and a reset pulse being delivered. When the last key is released the detector D2 again detects this and thus the static counter again counts backward unity. Thus the last cycle of the pulse generator C comprises 16 pulses and a reset pulse. The following example illustrates the procedure:

depressed keys last key in- In this diagram a new key is indicated by an asterisk and a pseudo-new key by a small circle. The code data of the latter are not applied to the output terminals, because in the respective interrogating cycle the data of a key have already been applied to H1.

When a key is depressed whilethe pulse generator C still is delivering the said l6 n) pulses, this results in an error signal which stops the cycle, an error signal being displayed on an indicator, not shown.

FIG. 3 shows by way of example an embodiment of a keyboard which does not include a rest key. In this keyboard all the keys are capable of fulfilling'the function of a rest key. The keyboard'compriseseight operative keys Al A8, a pulse generator Ml, two counters AAl and AA2, a comparator 04, an AND gate EN, two detectors D1 and D2, two logic units l2 and I3 and a pulse generator C2. Otherwise'the keyboard corresponds to that shown in FIG. 1.

The keyboard is interrogated whenthe detector Dl signals the depression of a key and also when the detector D2 signals the release of a key. In the former case the pulse generator C2 delivers interrogating pulses and a forward count pulse is applied to the counter AAl, causing its contents to be one key depressed." These initial contents are applied together with the output pulse from the ddetector D1 to the AND gate EN, with the result that a pulse is applied to the logic unit l2. This ensures that the code data of an integrated depressed key appear at the output H, even if these data have been stored in the stores. Thus the logic unit 12 opens the output device G. Subsequently the pulse generator M1 delivers the number of pulses required to transfer the information from the store F1 to the store F4. These pulse may be the pulses 3 11 from the generator Ml. In contrast with FIG. 1 the store Fl is looped around, so that after the 11th pulse all the storage units contain the code data of the one depressed key. The number of pulses from the generator M1 is tied to the contents of the counting device AAI, for example in that the pulses from the generator M1 after the first two (which have a different function) are generated by a ring counter the carry pulse of which causes the counting device AA2 to count backward unity, for example from four to zero. When the contents of the counters AAl and AA2 become equal, the comparator Q4 delivers a signal which causes the pulse generator M1 to stop and the counter AA2 to count back by one unit. (the counting range may be from 4 to 0). The logic unit I3 ensures that per cycle at most the code data of one key appear at the output I-I. Thus, the logic unit I3 may have two states, in the first of which the code data of a key which are not contained in a store, i.e., the data of a new key, can appear at the output, while in the second stage they cannot. The signal from the detector D1 always sets the logic unit I3 to the first state and the inequality signal from the logic unit 12 sets I3 to the second state. The third inequality signal opens the output device G and is produced in the same manner as is the inequality signal from the unit I in FIG. 2. When the AND gate EN is energized, the nonoccurrence of this inequality signal is neglected, but since the signals from the AND gate EN and from the logic unit 13 jointly arrive at the logic unit 12, always the code data of the interrogated and (single) depressed key are applied to the output terminal H. The cooperation between the signals from the gate EN and from the unit I3 may be effected, for example, in that these signals together with thesaid inequality signal are applied each to an input of a majority circuit which gives a signal when at least two of its three inputs are high. This majority element then is incorporated in the logic unit I2 and operates both'statically and dynamically. When thesingle depressed key is releasedthe detector D2 delivers a backward count pulse to the counter AAl and a pulse to the pulse generator C1. The contents of the counter AAl now are: "zero keys depressed. All the keys are interrogated once, but because no key is'depressed this interrogation may be dispensed with. We will assume that after the first depressed key (for example A5) a second key (for example A7) is depressed. The contents of the counter AAl will be: two keys depressed." As a result, at an interrogated and depressed condition the pulse generator M1 now delivers eight pulses (2 2 X 3) so that the code data are twice inserted into the store. The logic unit I3 ensures that in output terminal.

When a third pulse from the detector D1 is applied to the counter AAl, the contents thereof will be three keys depressed and each key is inserted once only. The procedure is as follows:

depressed last interrostored codes In addition to the three embodiments described, further embodiments may be used. For example, the number of keys or the number of simultaneously depressible keys may be increased. Furthermore either parallel operation or serial operation may be used in comparing the stored code data, in applying code data to the output terminal and in the production of the code data by the decoder. Also, the computer may be performing a function, causing the function keys to be mechanically blocked but permitting information (for example numbers) to be inserted into a subsidiary register.

Further it may be required to add an additional detector which detects whether 2 keys are simultaneously released. This method may-be used in combination with continuous scanning. Also, the keyboard may be divided in two sections which are operated by different operators, or there may be a plurality of different or identical keyboards connected to a computer which is to be optimally used. Possibly steps will have to be taken to deal with the case that the computer is still performing arithmetical operations. These steps may consist in that the main pulse generator C or the pulse generator C2 is blocked by an appropriate signal.

What is claimed is:

1. A keyboard apparatus, comprising a plurality of keys; commutating means for successively interrogating each of the plurality of keys; a storage device comprising first elements wherein coded data corresponding to a depressed key maybe stored and additional elements wherein coded data corresponding to additional depressed keys may be stored, the storage device being connected as a shift register; detection means responsive to the interrogation of a depressed key for providing a storage signal, the storage device operating in response to the storage signal to store the coded data corresponding to the first interrogated depressed key in the first storage element; comparison means connected to the first storage elements and to the additional storage elements for providing an output gating signal in response to a dissimilarity between the coded words stored in the first storage element and words stored in the additional storage elements; an output terminal; an output device operating in response to the output gating signal for providing the coded word stored in the first storage element to the output terminal; the detection means further providing a shift pulse delayed in time with respect to the storage signal and in advance of the interrogation of the next key in response to the interrogation of a depressed key.

2. A keyboard apparatus as claimed in claim 1, further comprising means for cyclically interrogating the successively interrogated keys; a rest key comprising a circuit interrogated once during each interrogation cycle for providing the detection means with a key signal analogous to that of a permanently depressed key; and wherein at least three additional storage elements are provided.

3. Keyboard apparatus as claimed in claim 1, wherein the commutating means comprises a clock pulse source having at least two different frequencies, the interrogation proceeding at the higher of the two clock pulse frequencies in a rest condition wherein no depressed keys are detected, and operating at the lower clock pulse frequency in response to the storage signal.

4. Apparatus as claimed in claim 1, further comprising blocking device means operating in response to the depression of a subsequent key within a predetermined time period after the depression of a first key for preventing the output device from providing the coded word corresponding to the second depressed key to the output terminal.

* II l mg I UNITED STATES "PATENT OFFICE CERTIFICATE OF CORRECTION Patent No. 3,750, 160 Dated July 31, 1973 Inventor(s) JOI-IANNES MATTHEUS ELZINGA It is certified phat error appears in the above-identified patent and that said Letters Patent are hereby corrected as shown below:

Col. 1, line 29, "kay" should be -key;

Col. 3, line 35, "last key interrogated" column "A4" should be A8;

Col. 6, line 6, "ddetector" should be -detector-;

Signed and sealed this 19th day of March 197b,.

(SEAL) Attest:

R,JR I C. MARSHALL DANN Commissioner of Patents 

1. A keyboard apparatus, comprising a plurality of keys; commutating means for successively interrogating each of the plurality of keys; a storage device comprising first elements wherein coded data corresponding to a depressed key maybe stored and additional elements wherein coded data corresponding to additional depressed keys may be stored, the storage device being connected as a shift register; detection means responsive to the interrogation of a depressed key for providing a storage signal, the storage device operating in response to the storage signal to store the coded data corresponding to the first interrogated depressed key in the first storage element; comparison means connected to the first storage elements and to the additional storage elements for providing an output gating signal in response to a dissimilarity between the coded words stored in the first storage element and words stored in the additional storage elements; an output terminal; an output device operating in response to the output gating signal for providing the coded word stored in the first storage element to the output terminal; the detection means further providing a shift pulse delayed in time with respect to the storage signal and in advance of the interrogation of the next key in response to the interrogation of a depressed key.
 2. A keyboard apparatus as claimed in claim 1, further comprising means for cyclically interrogating the successively interrogated keys; a rest key comprising a circuit interrogated once during each interrogation cycle for providing the detection means with a key signal analogous to that of a permanently depressed key; and wherein at least three additional storage elements are provided.
 3. Keyboard apparatus as claimed in claim 1, wherein the commutating means comprises a clock pulse source having at least two different frequencies, the interrogation proceeding at the higher of the two clock pulse frequencies in a rest condition wherein no depressed keys are detected, and operating at the lower clock pulse frequency in response to the storage signal.
 4. Apparatus as claimed in claim 1, further comprising blocking device means operating in response to the depression of a subsequent key within a predetermined time period after the depression of a first key for preventing the output device from providing the coded word corresponding to the second depressed key to the output terminal. 